Leveraging RISC-V as a Unified, Heterogeneous Platform for Next-Gen AI Chips
The demand for high-performance AI computation is reshaping the semiconductor industry, requiring innovative solutions that optimize performance, power efficiency, and flexibility. RISC-V, an open-source instruction set architecture (ISA), has emerged as a key enabler for next-generation AI chips by providing a unified framework for both hardware and software.
Akeana Processor Security Domain Support
Akeana extends the concept of two security domains (“worlds”, Non-Secure and Secure) into Non-Secure worlds plus many independent Secure Worlds. The NS bit is retained to indicate Secure vs. Non-Secure, but many Secure (and Non-Secure worlds) are available. The various Worlds are differentiated by individual World ID (WID) values.